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 PD - 93804B
Applications
l
High frequency DC-DC converters
HEXFET(R) Power MOSFET
IRFB41N15D IRFIB41N15D IRFS41N15D IRFSL41N15D
VDSS RDS(on) max
Benefits
l l
ID
41A
l
Low Gate-to-Drain Charge to Reduce Switching Losses Fully Characterized Capacitance Including Effective COSS to Simplify Design, (See App. Note AN1001) Fully Characterized Avalanche Voltage and Current
150V
0.045:
TO-220AB TO-220 FullPak D2Pak TO-262 IRFB41N15D IRFIB41N15D IRFS41N15D IRFSL41N15D
Absolute Maximum Ratings
Parameter
ID @ TC = 25C IDM PD @TA = 25C PD @TC = 25C PD @TC = 25C Continuous Drain Current, VGS @ 10V Pulsed Drain Current ID @ TC = 100C Continuous Drain Current, VGS @ 10V
Max.
41 29 164 3.1 200 48 1.3 0.32 30 2.7 -55 to + 175
Units
A W
c
Power Dissipation, D Pak Power Dissipation, TO-220 Power Dissipation, Fullpak Linear Derating Factor, TO-220 Linear Derating Factor, Fullpak
2
W/C V V/ns C
VGS dv/dt TJ TSTG
Gate-to-Source Voltage Peak Diode Recovery dv/dt Operating Junction and
e
Storage Temperature Range Soldering Temperature, for 10 seconds Mounting torque, 6-32 or M3 screw 300 (1.6mm from case ) 1.1(10)
N*m (lbf*in)
Thermal Resistance
Parameter
RJC RJC Rcs RJA RJA RJA Junction-to-Case Junction-to-Case, Fullpak Case-to-Sink, Flat, Greased Surface
Typ.
--- --- 0.50 --- --- ---
Max.
0.75 3.14 --- 62 40 65
Units
C/W
h Junction-to-Ambient, D Pak i
Junction-to-Ambient, TO-220
2
h
Junction-to-Ambient, Fullpak
Notes
through are on page 12
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1
07/16/03
IRFB/IRFIB/IRFS/IRFSL41N15D
Static @ TJ = 25C (unless otherwise specified)
Parameter
V(BR)DSS V(BR)DSS/TJ RDS(on) VGS(th) IDSS IGSS Drain-to-Source Breakdown Voltage Breakdown Voltage Temp. Coefficient Static Drain-to-Source On-Resistance Gate Threshold Voltage Drain-to-Source Leakage Current Gate-to-Source Forward Leakage Gate-to-Source Reverse Leakage
Min. Typ. Max. Units
150 --- --- 3.0 --- --- --- --- --- 0.17 --- --- --- --- --- --- --- --- 0.045 5.5 25 250 100 -100 nA V
Conditions
VGS = 0V, ID = 250A
V/C Reference to 25C, ID = 1mA VGS = 10V, ID = 25A
f
V A
VDS = VGS, ID = 250A VDS = 150V, VGS = 0V VDS = 120V, VGS = 0V, TJ = 150C VGS = 30V VGS = -30V
Dynamic @ TJ = 25C (unless otherwise specified)
Parameter
gfs Qg Qgs Qgd td(on) tr td(off) tf Ciss Coss Crss Coss Coss Coss eff. Forward Transconductance Total Gate Charge Gate-to-Source Charge Gate-to-Drain ("Miller") Charge Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Input Capacitance Output Capacitance Reverse Transfer Capacitance Output Capacitance Output Capacitance Effective Output Capacitance Parameter EAS IAR EAR Single Pulse Avalanche Energyd Avalanche CurrentA Repetitive Avalanche Energy
Min. Typ. Max. Units
18 --- --- --- --- --- --- --- --- --- --- --- --- --- --- 72 21 35 16 63 25 14 2520 510 110 3090 230 250 --- 110 31 52 --- --- --- --- --- --- --- --- --- --- Typ. --- --- --- pF ns nC S
Conditions
VDS = 50V, ID = 25A ID = 25A VDS = 120V VGS = 10V VDD = 75V ID = 25A RG = 2.5 VGS = 10V VGS = 0V VDS = 25V = 1.0MHz VGS = 0V, VDS = 1.0V, = 1.0MHz VGS = 0V, VDS = 120V, = 1.0MHz VGS = 0V, VDS = 0V to 120V Max. 470 25 20
f f
g
Avalanche Characteristics
Units mJ A mJ
--- --- --- --- --- --- --- --- 170 1.3
Diode Characteristics
Parameter
IS ISM VSD trr Qrr ton Continuous Source Current (Body Diode) Pulsed Source Current (Body Diode)A Diode Forward Voltage Reverse Recovery Time Reverse Recovery Charge Forward Turn-On Time
Min. Typ. Max. Units
41 A 164 1.3 260 1.9 V ns C
Conditions
MOSFET symbol showing the integral reverse
G S D
p-n junction diode. TJ = 25C, IS = 25A, VGS = 0V TJ = 25C, IF = 25A
f
di/dt = 100A/s Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
f
2
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IRFB/IRFIB/IRFS/IRFSL41N15D
1000
VGS 15V 10V 9.0V 8.0V 7.5V 7.0V 6.5V BOTTOM 6.0V TOP
1000
I D , Drain-to-Source Current (A)
I D , Drain-to-Source Current (A)
VGS 15V 10V 9.0V 8.0V 7.5V 7.0V 6.5V BOTTOM 6.0V TOP
100
100
10
10
6.0V
6.0V
1 0.1 1
20s PULSE WIDTH TJ = 25 C
10 100
1 0.1
20s PULSE WIDTH TJ = 175 C
1 10 100
VDS , Drain-to-Source Voltage (V)
VDS , Drain-to-Source Voltage (V)
Fig 1. Typical Output Characteristics
Fig 2. Typical Output Characteristics
1000
3.0
RDS(on) , Drain-to-Source On Resistance (Normalized)
ID = 41A
I D , Drain-to-Source Current (A)
2.5
100
2.0
TJ = 175 C
1.5
TJ = 25 C
10
1.0
0.5
1 6 7 8
V DS = 25V 20s PULSE WIDTH 9 10 11
0.0 -60 -40 -20 0
VGS = 10V
20 40 60 80 100 120 140 160 180
VGS , Gate-to-Source Voltage (V)
TJ , Junction Temperature ( C)
Fig 3. Typical Transfer Characteristics
Fig 4. Normalized On-Resistance vs. Temperature
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3
IRFB/IRFIB/IRFS/IRFSL41N15D
100000 VGS = 0V, f = 1 MHZ C iss = C gs + C gd, C ds Crss = C gd Coss = C ds + Cgd
20
ID = 25A VDS = 120V VDS = 75V VDS = 30V
VGS , Gate-to-Source Voltage (V)
SHORTED
16
10000
C, Capacitance(pF)
Ciss
1000
12
Coss
100
8
Crss
4
10 1 10 100 1000
0 0 20 40 60
FOR TEST CIRCUIT SEE FIGURE 13
80 100 120
VDS, Drain-to-Source Voltage (V)
QG , Total Gate Charge (nC)
Fig 5. Typical Capacitance Vs. Drain-to-Source Voltage
Fig 6. Typical Gate Charge Vs. Gate-to-Source Voltage
1000
1000
ISD , Reverse Drain Current (A)
OPERATION IN THIS AREA LIMITED BY RDS(on)
TJ = 175 C
I D , Drain Current (A)
100
100
10us
10
100us
TJ = 25 C
1
10
1ms
0.1 0.2
V GS = 0 V
0.6 1.0 1.4 1.8
1
TC = 25 C TJ = 175 C Single Pulse
1 10 100
10ms
1000
VSD ,Source-to-Drain Voltage (V)
VDS , Drain-to-Source Voltage (V)
Fig 7. Typical Source-Drain Diode Forward Voltage
Fig 8. Maximum Safe Operating Area
4
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IRFB/IRFIB/IRFS/IRFSL41N15D
50
V DS VGS
RD
40
ID , Drain Current (A)
RG VGS
Pulse Width 1 s Duty Factor 0.1 %
D.U.T.
+
-VDD
30
20
Fig 10a. Switching Time Test Circuit
10
VDS 90%
0 25 50 75 100 125 150 175
TC , Case Temperature ( C)
10% VGS
Fig 9. Maximum Drain Current Vs. Case Temperature
td(on)
tr
t d(off)
tf
Fig 10b. Switching Time Waveforms
10
Thermal Response (Z thJC )
1 D = 0.50 0.20 0.1 0.10 0.05 0.02 0.01 SINGLE PULSE (THERMAL RESPONSE) Notes: 1. Duty factor D = t 1 / t 2 2. Peak TJ = P DM x Z thJC + TC 0.001 0.01 0.1 1
PDM t1 t2
0.01 0.00001
0.0001
t1 , Rectangular Pulse Duration (sec)
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
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5
IRFB/IRFIB/IRFS/IRFSL41N15D
1200
15V
EAS , Single Pulse Avalanche Energy (mJ)
TOP
TOP
1000
BOTTOM
ID ID 7.3A 10A 13A 21A 18A
VDS
L
DRIVER
BOTTOM
25A
800
RG
VGS 20V
D.U.T
IAS tp
+ V - DD
A
600
0.01
Fig 12a. Unclamped Inductive Test Circuit
V(BR)DSS tp
400
200
0 25 50 75 100 125 150 175
Starting TJ , Junction Temperature ( C)
Fig 12c. Maximum Avalanche Energy Vs. Drain Current
I AS
Fig 12b. Unclamped Inductive Waveforms
Current Regulator Same Type as D.U.T.
50K
QG
12V
.2F .3F
VGS
QGS VG QGD
VGS
3mA
D.U.T.
+ V - DS
IG
ID
Charge
Current Sampling Resistors
Fig 13a. Basic Gate Charge Waveform
Fig 13b. Gate Charge Test Circuit
6
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IRFB/IRFIB/IRFS/IRFSL41N15D
Peak Diode Recovery dv/dt Test Circuit
D.U.T
+
+
Circuit Layout Considerations * Low Stray Inductance * Ground Plane * Low Leakage Inductance Current Transformer
-
+
RG * * * * dv/dt controlled by RG Driver same type as D.U.T. ISD controlled by Duty Factor "D" D.U.T. - Device Under Test
+ VDD
Driver Gate Drive P.W. Period D=
P.W. Period VGS=10V
*
D.U.T. ISD Waveform Reverse Recovery Current Body Diode Forward Current di/dt D.U.T. VDS Waveform Diode Recovery dv/dt
VDD
Re-Applied Voltage Inductor Curent
Body Diode
Forward Drop
Ripple 5%
ISD
* VGS = 5V for Logic Level Devices Fig 14. For N-Channel HEXFET(R) Power MOSFETs
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7
IRFB/IRFIB/IRFS/IRFSL41N15D
TO-220AB Package Outline
2.87 (.113) 2.62 (.103) 10.54 (.415) 10.29 (.405)
Dimensions are shown in millimeters (inches)
3.78 (.149) 3.54 (.139) -A6.47 (.255) 6.10 (.240) -B4.69 (.185) 4.20 (.165) 1.32 (.052) 1.22 (.048)
4 15.24 (.600) 14.84 (.584)
1.15 (.045) MIN 1 2 3
LEAD ASSIGNMENTS 1 - GATE 2 - DRAIN 3 - SOURCE 4 - DRAIN
14.09 (.555) 13.47 (.530)
4.06 (.160) 3.55 (.140)
3X 3X 1.40 (.055) 1.15 (.045)
0.93 (.037) 0.69 (.027) M BAM
3X
0.55 (.022) 0.46 (.018)
0.36 (.014)
2.54 (.100) 2X NOTES: 1 DIMENSIONING & TOLERANCING PER ANSI Y14.5M, 1982. 2 CONTROLLING DIMENSION : INCH
2.92 (.115) 2.64 (.104)
3 OUTLINE CONFORMS TO JEDEC OUTLINE TO-220AB. 4 HEATSINK & LEAD MEASUREMENTS DO NOT INCLUDE BURRS.
TO-220AB Part Marking Information
EXAMPLE: THIS IS AN IRF1010 LOT CODE 1789 AS S EMBLED ON WW 19, 1997 IN T HE AS S EMBLY LINE "C" INT ERNAT IONAL RECT IFIER LOGO AS S EMBLY LOT CODE PART NUMBER
DAT E CODE YEAR 7 = 1997 WEEK 19 LINE C
For GB Production
EXAMPLE: T HIS IS AN IRF1010 LOT CODE 1789 AS S EMBLED ON WW 19, 1997 IN T HE AS S EMBLY LINE "C" INT ERNAT IONAL RECT IFIER LOGO LOT CODE PART NUMBER
DATE CODE
8
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IRFB/IRFIB/IRFS/IRFSL41N15D
TO-220 Full-Pak Package Outline
Dimensions are shown in millimeters (inches)
10.60 (.417) 10.40 (.409) o 3.40 (.133) 3.10 (.123) -A3.70 (.145) 3.20 (.126) 4.80 (.189) 4.60 (.181) 2.80 (.110) 2.60 (.102) LEAD ASSIGNMENTS 1 - GATE 2 - DRAIN 3 - SOURCE
7.10 (.280) 6.70 (.263)
16.00 (.630) 15.80 (.622)
1.15 (.045) MIN. 1 2 3
NOTES: 1 DIMENSIONING & TOLERANCING PER ANSI Y14.5M, 1982 2 CONTROLLING DIMENSION: INCH.
3.30 (.130) 3.10 (.122) -B13.70 (.540) 13.50 (.530) C D
A 3X 1.40 (.055) 1.05 (.042) 0.90 (.035) 3X 0.70 (.028) 0.25 (.010) 2.54 (.100) 2X M AM B 3X 0.48 (.019) 0.44 (.017)
B
2.85 (.112) 2.65 (.104)
MINIMUM CREEPAGE DISTANCE BETWEEN A-B-C-D = 4.80 (.189)
TO-220 Full-Pak Part Marking Information
Notes: This part marking information applies to all devices produced before 02/26/2001 and currently for parts manufactured in GB.
EXAMPLE: T HIS IS AN IRFI840G WITH ASS EMBLY LOT CODE E401
INT ERNATIONAL RECT IFIER LOGO ASS EMBLY LOT CODE
PART NUMBER
IRF I840G E401 9245
DATE CODE (YYWW) YY = YEAR WW = WEEK
Notes : T his part marking information applies to devices produced after 02/26/2001 in location other than GB.
EXAMPLE: THIS IS AN IRFI840G WITH AS SEMBLY LOT CODE 3432 AS SEMBLED ON WW 24 1999 IN THE AS SEMBLY LINE "K"
INTERNATIONAL RECT IFIER LOGO AS SEMBLY LOT CODE
PART NUMBER
IRFI840G 924K 34 32
DAT E CODE YEAR 9 = 1999 WEEK 24 LINE K
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9
IRFB/IRFIB/IRFS/IRFSL41N15D
D2Pak Package Outline
Dimensions are shown in millimeters (inches)
D2Pak Part Marking Information
T HIS IS AN IRF530S WIT H LOT CODE 8024 ASS EMBLED ON WW 02, 2000 IN T HE ASS EMBLY LINE "L" INT ERNAT IONAL RECT IFIER LOGO ASS EMBLY LOT CODE PART NUMBER F 530S DAT E CODE YEAR 0 = 2000 WEEK 02 LINE L
10
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IRFB/IRFIB/IRFS/IRFSL41N15D
TO-262 Package Outline
Dimensions are shown in millimeters (inches)
IGBT 1- GATE 2- COLLECTOR 3- EMITTER
TO-262 Part Marking Information
EXAMPLE: T HIS IS AN IRL3103L LOT CODE 1789 ASS EMBLED ON WW 19, 1997 IN THE ASS EMBLY LINE "C" INT ERNATIONAL RECTIFIER LOGO AS SEMBLY LOT CODE PART NUMBER
DATE CODE YEAR 7 = 1997 WEEK 19 LINE C
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11
IRFB/IRFIB/IRFS/IRFSL41N15D
D2Pak Tape & Reel Information
TRR
1.60 (.063) 1.50 (.059) 4.10 (.161) 3.90 (.153)
1.60 (.063) 1.50 (.059) 0.368 (.0145) 0.342 (.0135)
FEED DIRECTION 1.85 (.073)
1.65 (.065)
11.60 (.457) 11.40 (.449) 15.42 (.609) 15.22 (.601)
24.30 (.957) 23.90 (.941)
TRL
10.90 (.429) 10.70 (.421) 1.75 (.069) 1.25 (.049) 16.10 (.634) 15.90 (.626) 4.72 (.136) 4.52 (.178)
FEED DIRECTION
13.50 (.532) 12.80 (.504)
27.40 (1.079) 23.90 (.941)
4
330.00 (14.173) MAX.
60.00 (2.362) MIN.
NOTES : 1. COMFORMS TO EIA-418. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION MEASURED @ HUB. 4. INCLUDES FLANGE DISTORTION @ OUTER EDGE.
26.40 (1.039) 24.40 (.961) 3
30.40 (1.197) MAX. 4
Notes:
Repetitive rating; pulse width limited by
max. junction temperature. Starting TJ = 25C, L = 1.5mH, RG = 25, IAS = 25A. ISD 25A, di/dt 340A/s, VDD V(BR)DSS, TJ 175C. Pulse width 300s; duty cycle 2%.
Coss eff. is a fixed capacitance that gives the same charging time
as Coss while VDS is rising from 0 to 80% VDSS
This is only applied to TO-220AB package. This is applied to D2Pak, when mounted on 1" square PCB
( FR-4 or G-10 Material ). For recommended footprint and soldering techniques refer to application note #AN-994.
TO-220AB & TO-220 FullPak packages are not recommended for Surface Mount Application. Data and specifications subject to change without notice. This product has been designed and qualified for the Industrial market. Qualification Standards can be found on IR's Web site.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105 TAC Fax: (310) 252-7903 Visit us at www.irf.com for sales contact information.07/03
12
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